8” Open Innovation Silicon Carbide Pilot Line and Platform Technologies at A*STAR Singapore

8” Open Innovation Silicon Carbide Pilot Line and Platform Technologies at A*STAR Singapore

🎙 Dr. Navab Singh 👥 5K 📅 January 27, 2026 ⏱ 27 min 👁 70 📄 expert opinion 🧭 2026-08-16
Available in: English (current) Français

Keywords

SiCpilot lineMOSFETtrench gatesuperjunction

Summary

Dr. Navab Singh from ASTAR’s Institute of Microelectronics (IME) presents the capabilities of their 8-inch silicon carbide (SiC) pilot line and platform technologies. He begins by introducing ASTAR and IME, highlighting their cleanroom facilities and research focus. The talk emphasizes SiC’s superior material properties for power electronics, particularly its high breakdown field and thermal conductivity. The major challenges in SiC MOSFET development are discussed, including poor MOS interface quality, bias temperature instability (BTI), and crystal defects. Singh details how IME has addressed these challenges through optimized oxidation processes, channeling implantation, and epitaxial growth improvements. They have achieved low defect densities and sharp interfaces, leading to improved mobility and BTI performance. The presentation covers process modules for planar and trench-gate MOSFETs, as well as future directions like superjunction and fin-based devices. IME’s line is ready for industry collaboration, with capabilities in epitaxy, implantation, etching, and device integration. The talk concludes with a Q&A session addressing specific device performance and collaboration models.

160 words

Critical Evaluation

Value of the Information & Strength of the Argument

The presentation provides valuable insights into the practical development of SiC power devices, detailing specific process innovations and results. The argumentation is solid, supported by data on defect densities, interface quality, and device characteristics. The speaker demonstrates a deep understanding of the technical challenges and offers credible solutions, such as the use of AI/ML for process optimization and novel alignment schemes for superjunction devices. The value lies in the detailed account of an industrial-grade pilot line, which is rare in academic literature.

91 words

Title / Content Match

The title accurately reflects the content, which focuses on the pilot line and platform technologies.

Quality & Reliability

8/10

Presentation by a senior researcher from A*STAR's Institute of Microelectronics, detailing specific process developments and results. Claims are plausible and consistent with known SiC challenges, but lack peer-reviewed verification in this context.

Key Moments

Contribution & Novelties

The talk provides a detailed overview of A*STAR’s SiC pilot line, highlighting specific innovations such as AI/ML-driven process optimization, channeling implantation, and a novel alignment scheme for superjunction devices. These developments contribute to advancing SiC power device manufacturing.

Pour aller plus loin :

82 words

Radar Profile

The radar profile shows high scores in technical level and information quality, indicating a specialized and detailed presentation. The lower score in quantity of information is due to the focused scope, but overall the talk is comprehensive for its intended audience.

Reliability 8/10