Digital Design & Comp. Arch: L10: Microarchitecture Fundamentals and Design (Spring 2026)

Item: Digital Design & Comp. Arch: L10: Microarchitecture Fundamentals and Design (Spring 2026)
Rating: 5
Author: PostSingularity Institute

by Dr. Mohammad Sadrosadati and Prof. Onur Mutlu

Formal & Physical Sciences Computing & Cybersecurity UYComputer science UYFComputer architecture and logic design

🎙 Dr. Mohammad Sadrosadati and Prof. Onur Mutlu 👥 64K 📅 March 21, 2026 ⏱ 108 min 👁 2K 📄 lecture 🧭 2026-08-15

Available in: English (current) Français

Keywords

microarchitecturesingle-cycledata pathcontrol logicCPI

Summary

This lecture, part of the Digital Design and Computer Architecture course at ETH Zürich, introduces microarchitecture fundamentals and focuses on the single-cycle processor design. The instructor, Dr. Mohammad Sadrosadati, begins by defining microarchitecture as the hardware implementation of an ISA under design constraints, emphasizing that it must adhere to the von Neumann model. He explains the concept of architectural state transitions and how microarchitecture can introduce intermediate, programmer-invisible states to optimize performance. The lecture contrasts single-cycle and multi-cycle implementations, highlighting that single-cycle processors have a clock cycle determined by the slowest instruction, leading to inefficiency. The fundamental steps of instruction processing (fetch, decode, evaluate addresses, fetch operands, execute, store) are outlined. The data path and control logic are introduced as the two main components of an instruction processing engine, with control signals generated based on the data path design. The lecture concludes with a performance analysis framework using CPI and clock cycle time, and foreshadows future lectures on multi-cycle and pipelined designs. The presentation is well-structured, building on prior knowledge and providing a solid foundation for understanding more advanced microarchitectures.

180 words

Critical Evaluation

Value of the Information & Strength of the Argument

The lecture provides a solid foundation in microarchitecture concepts, clearly explaining the trade-offs between single-cycle and multi-cycle designs. The argumentation is logical and well-supported, using the von Neumann model and instruction processing steps to justify design choices. The instructor effectively foreshadows performance implications, such as the impact of the slowest instruction on clock cycle time, which is a key insight. The content is valuable for students and practitioners seeking to understand processor design fundamentals.

83 words

Title / Content Match

The title accurately reflects the content, which covers microarchitecture fundamentals and single-cycle design.

Quality & Reliability

9/10

Lecture by renowned experts in computer architecture, based on established textbook concepts and supplemented with recent research references. High technical accuracy and clear pedagogical structure.

Key Moments

Markers derived by PSI from the transcript: the creator did not define chapters.

Cited Sources

A Modern Primer on Processing in Memory — Recommended reading for understanding memory-centric computing.
Memory-Centric Computing: Solving Computing's Memory Problem — Recommended reading on memory-centric computing.
Memory-Centric Computing: Recent Advances in Processing-in-DRAM — Recommended reading on processing-in-DRAM.
Intelligent Architectures for Intelligent Computing Systems — Recommended reading on intelligent architectures.
RowHammer: A Retrospective — Recommended reading on RowHammer vulnerability.
Fundamentally Understanding and Solving RowHammer — Recommended reading on RowHammer.
Accelerating Genome Analysis via Algorithm-Architecture Co-Design — Recommended reading on genome analysis acceleration.
From Molecules to Genomic Variations: Accelerating Genome Analysis via Intelligent Algorithms and Architectures — Recommended reading on genome analysis.
Lecture Slides (pptx) — Slides used in the lecture.
Lecture Slides (pdf) — PDF version of the lecture slides.

Concurring Sources

A Modern Primer on Processing in Memory — Supports the discussion on memory-centric computing, which is relevant to modern microarchitecture.
Memory-Centric Computing: Solving Computing's Memory Problem — Provides context on memory-centric computing trends.

External References

Contribution & Novelties

This lecture provides a clear and structured introduction to microarchitecture, emphasizing the trade-offs between single-cycle and multi-cycle designs. It builds on prior knowledge of digital design and sets the stage for more advanced topics. The lecture’s contribution lies in its pedagogical clarity and the integration of recent research references, such as memory-centric computing and RowHammer, which are relevant to modern processor design.

Pour aller plus loin :

Single-cycle processor — Wikipedia article on instruction cycle, relevant to understanding the single-cycle execution model.
Cycles per instruction (CPI) — Wikipedia article explaining CPI, a key performance metric discussed in the lecture.
Data path — Wikipedia article on datapath, the hardware component central to the lecture.
Control unit — Wikipedia article on control units, which generate control signals as discussed.
Patterson and Hennessy, Computer Organization and Design — Textbook reference for further reading on microarchitecture.

142 words

Radar Profile

The radar profile shows high scores across all dimensions, indicating a well-balanced and comprehensive lecture. The high technical level and strong reliability reflect the expertise of the instructors and the quality of the content.

Reliability 9/10