Computer Architecture - Lecture 5: Memory-Centric Computing II (Fall 2025)

Computer Architecture - Lecture 5: Memory-Centric Computing II (Fall 2025)

🎙 Muhammad Sadra Salati (co-instructor), Onur Mutlu (course lecturer) 👥 64K 📅 October 10, 2025 ⏱ 158 min 👁 2K 📄 lecture 🧭 2026-08-16
Available in: English (current) Français

Keywords

processing-in-memoryDRAMtrue random number generatorphysical unclonable functionflash memory

Summary

This lecture, part of the Computer Architecture course at ETH Zürich, continues the exploration of memory-centric computing, focusing on processing using memory and processing near memory. The instructor, Muhammad Sadra Salati, begins by reviewing prior work on using DRAM for computation, highlighting that commercial DRAM chips can perform operations like row copying and bitwise logic. He then introduces several novel techniques: using reduced timing to generate true random numbers from DRAM cells, leveraging DRAM as a physical unclonable function for device authentication, and employing DRAM as lookup tables for complex operations. The lecture also covers processing using other memory technologies, such as flash memory (FlashCosmos) for logic operations and acceleration of homomorphic encryption, and emerging non-volatile memories with crossbar arrays for analog MAC operations. The second half shifts to processing near memory, emphasizing a top-down approach to accelerate applications bottlenecked by data movement. The lecture concludes with a discussion of various processing-near-memory designs and their potential to improve performance and energy efficiency.

162 words

Critical Evaluation

Value of the Information & Strength of the Argument

The lecture provides high-value information by presenting cutting-edge research on memory-centric computing, with a strong emphasis on experimental validation and practical implications. The argumentation is solid, as each technique is motivated by clear observations (e.g., DRAM timing violations leading to random failures) and supported by empirical results (e.g., throughput and latency measurements). The instructor effectively explains complex concepts, such as using DRAM as a random number generator or as a physical unclonable function, with concrete examples and analogies. The discussion of trade-offs, such as the impact of activating multiple rows on throughput, demonstrates a balanced and rigorous approach.

Scientific Rigor, Source Quality, Title Accuracy

The lecture demonstrates high scientific rigor, with references to peer-reviewed papers and technical reports, many of which are provided in the description. The sources are credible, coming from the SAFARI research group and other leading institutions. The title accurately reflects the content, which is a continuation of the memory-centric computing series. The lecture is well-structured, building on previous material and clearly explaining the state of the art. The use of real hardware experiments and detailed analysis further enhances the credibility. No significant discrepancies or unsupported claims were identified.

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Title / Content Match

The title accurately reflects the content, which continues the discussion on memory-centric computing, focusing on processing using and near memory.

Quality & Reliability

9/10

Lecture by a leading researcher in computer architecture, based on peer-reviewed publications and extensive experimental validation. The content is technically rigorous, with clear explanations and references to primary sources.

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Contribution & Novelties

The lecture provides a comprehensive overview of recent advances in memory-centric computing, with a focus on novel techniques for processing using DRAM and other memory technologies. It highlights the potential of using DRAM timing violations for true random number generation and physical unclonable functions, as well as the use of flash memory for logic operations and acceleration of homomorphic encryption. The discussion of processing near memory offers a practical perspective on reducing data movement overheads. The lecture is valuable for researchers and practitioners interested in computer architecture and memory systems.

Pour aller plus loin :

115 words

Radar Profile

The radar profile shows high scores across all dimensions, indicating a well-rounded and reliable lecture. The quantity and quality of information are strong, with a high technical level and excellent overall reliability.

Reliability 9/10