Comp. Arch. - Lecture 24: On-Chip Networks & Router Design (Fall 2025)

Comp. Arch. - Lecture 24: On-Chip Networks & Router Design (Fall 2025)

by Onur Mutlu

Formal & Physical Sciences Computing & Cybersecurity UYComputer scienceUYFComputer architecture and logic design
🎙 Onur Mutlu 👥 64K 📅 December 13, 2025 ⏱ 167 min 👁 3K 📄 lecture 🧭 2026-08-15
Available in: English (current) Français

Keywords

on-chip networkrouterflow controltopologylatency

Summary

This lecture, part of the Computer Architecture course at ETH Zürich, delves into the design of on-chip networks and routers. Professor Onur Mutlu begins by reviewing key concepts from previous lectures, such as buffered flow control and virtual channels, and then introduces the load-latency curve as a fundamental performance metric. He discusses various topologies, including mesh, concentrated mesh, flattened butterfly, and multi-drop express channels, highlighting their trade-offs in latency and throughput. The lecture emphasizes the importance of application-level performance metrics over synthetic traffic patterns, and explores how on-chip networks are evolving to meet the demands of modern workloads, such as AI accelerators and memory-centric computing. The latter part of the lecture focuses on router microarchitecture, covering input and output buffering, virtual channel allocation, switch allocation, and crossbar design. Mutlu also touches on advanced topics like bufferless routing and deflection routing, and discusses the challenges of energy efficiency and scalability. The lecture concludes with a discussion of future directions, including 3D stacking and optical interconnects, and encourages students to think critically about network design for emerging applications.

176 words

Critical Evaluation

Value of the Information & Strength of the Argument

The lecture provides a comprehensive and insightful analysis of on-chip network design, emphasizing the trade-offs between different topologies and flow control mechanisms. Mutlu argues convincingly that application-level performance should be the primary metric, rather than synthetic traffic patterns, and supports this with examples from his own research. The argumentation is solid, with clear explanations of concepts and their implications. The lecture also highlights the importance of energy efficiency and scalability, which are critical in modern systems. Overall, the content is highly valuable for students and researchers in computer architecture.

Scientific Rigor, Source Quality, Title Accuracy

The lecture is scientifically rigorous, with references to relevant academic papers and textbooks. Mutlu cites his own research and that of others, providing a solid foundation for the concepts discussed. The title accurately reflects the content, and the lecture is well-structured and logically organized. The sources are credible and appropriate for the level of the course. The lecture also includes practical examples and case studies, enhancing its credibility. Overall, the scientific rigor and source quality are excellent.

181 words

Title / Content Match

The title accurately reflects the content, which focuses on on-chip networks and router design.

Quality & Reliability

9/10

Lecture by a renowned professor in computer architecture, with detailed technical content and references to academic papers. The presentation is rigorous and well-structured, though it is a lecture rather than a peer-reviewed publication.

Key Moments

Markers derived by PSI from the transcript: the creator did not define chapters.

Cited Sources

Concurring Sources

External References

Contribution & Novelties

The lecture provides a comprehensive overview of on-chip network design, emphasizing the importance of application-level performance and the trade-offs between different topologies and flow control mechanisms. It also discusses emerging trends such as memory-centric computing and 3D stacking, which are crucial for future architectures.

Pour aller plus loin :

  • On-Chip Networks — Overview of network-on-chip concepts.
  • Virtual Channel — Explanation of virtual channels in network design.
  • Deflection Routing — Introduction to deflection routing techniques.
  • Processing-in-Memory — Overview of processing-in-memory paradigms.

80 words

Radar Profile

The radar profile shows high scores across all dimensions, indicating a well-balanced and comprehensive lecture. The high scores in quantity and quality of information, technical level, and reliability reflect the depth and accuracy of the content.

Reliability 9/10