Comp. Arch. - Lecture 16: Flash Memory and Solid-State Drives (Fall 2025)

Comp. Arch. - Lecture 16: Flash Memory and Solid-State Drives (Fall 2025)

🎙 Prof. Onur Mutlu 👥 64K 📅 November 15, 2025 ⏱ 170 min 👁 1K 📄 lecture 🧭 2026-08-15
Available in: English (current) Français

Keywords

flash memorySSDNANDFTLgarbage collectionaddress mappingECCrandomizationstorage controllerread/write operations

Summary

This lecture, part of the Computer Architecture course at ETH Zürich, provides an in-depth overview of flash memory and solid-state drives (SSDs). The lecturer, Prof. Onur Mutlu, begins by emphasizing the importance of emerging memory technologies and the historical challenges faced by flash memory. He then describes the architecture of a modern SSD, including its components: NAND flash packages, DRAM buffer, and the SSD controller. The lecture explains the role of the flash translation layer (FTL) in managing address mapping, garbage collection, wear leveling, and data refreshing. It details the read and write operations, highlighting the out-of-place update mechanism due to the erase-before-write property of flash. The importance of a write buffer to reduce latency and improve scheduling is discussed, along with the need for ECC and randomization to ensure data integrity. The lecture also covers the logical-to-physical address mapping and the use of DRAM for storing mapping tables. The content is technical and aimed at advanced students, providing a solid foundation for understanding SSD design and operation.

168 words

Critical Evaluation

Value of the Information & Strength of the Argument

The lecture provides valuable insights into the design and operation of SSDs, covering both fundamental concepts and advanced techniques. The argumentation is solid, as the lecturer explains the rationale behind each design choice, such as out-of-place updates, garbage collection, and the use of a write buffer. The content is well-supported by references to research papers and course materials, enhancing its credibility. The lecturer’s expertise is evident, and the explanations are clear and logical, making complex topics accessible.

Scientific Rigor, Source Quality, Title Accuracy

The lecture demonstrates high scientific rigor, with references to peer-reviewed papers and course materials. The sources cited are relevant and authoritative, including works on processing-in-memory, RowHammer, and genome analysis. The title accurately reflects the content, which is a comprehensive lecture on flash memory and SSDs. The lecture is well-structured and provides a thorough overview of the subject, with appropriate technical depth.

153 words

Title / Content Match

The title accurately reflects the content, which is a comprehensive lecture on flash memory and SSDs.

Quality & Reliability

9/10

Lecture by a leading academic in computer architecture, with detailed technical content and references to peer-reviewed papers and course materials. The content is well-structured and based on established research.

Key Moments

Cited Sources

Concurring Sources

External References

Contribution & Novelties

This lecture provides a comprehensive and up-to-date overview of flash memory and SSD architecture, integrating recent research insights. It offers a detailed walkthrough of SSD operations, including write and read paths, and explains the rationale behind key design choices. The lecture also highlights ongoing research challenges, such as reliability and endurance, and connects them to broader memory-centric computing trends.

Pour aller plus loin :

112 words

Radar Profile

The radar profile shows high scores across all dimensions, indicating a well-balanced and comprehensive lecture. The high scores in quantity and quality of information, technical depth, and reliability reflect the lecturer's expertise and the thorough coverage of the topic.

Reliability 9/10