R&DB: The Second Tutorial on Ramulator & DRAM Bender, held with ISCA 2026, 27th June 2026

R&DB: The Second Tutorial on Ramulator & DRAM Bender, held with ISCA 2026, 27th June 2026

by Onur Mutlu Lectures

Applied Sciences & Engineering Computing & Cybersecurity UYComputer scienceUYFComputer architecture and logic design
🎙 Onur Mutlu Lectures 👥 64K 📅 June 28, 2026 ⏱ 523 min 👁 899 📄 tutorial 🧭 2026-08-15
Available in: English (current) Français

Keywords

RamulatorDRAM Bendermemory controllerrow hammersimulation

Summary

This tutorial, held at ISCA 2026, provides an in-depth introduction to two open-source tools for DRAM research: Ramulator, a cycle-accurate main memory simulator, and DRAM Bender, an FPGA-based DRAM testing infrastructure. The session begins with an overview by Professor Onur Mutlu, who explains the importance of memory-centric computing and the need for accurate evaluation tools. He discusses the evolution of DRAM technology, highlighting issues like row hammer and read disturbance, and how DRAM Bender has enabled experimental characterization of these phenomena. The tutorial then covers the architecture and usage of Ramulator 2.0 and 2.1, including recent updates. Invited speakers share their experiences using these tools for real-chip characterization and system-level simulation. The latter part includes hands-on sessions where participants can learn to use the tools. The tutorial emphasizes the importance of open-source infrastructure for advancing memory research and encourages collaboration. Overall, it serves as a comprehensive resource for researchers and practitioners interested in DRAM simulation and testing.

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Critical Evaluation

Value of the Information & Strength of the Argument

The tutorial provides substantial value by offering a comprehensive overview of two critical tools for DRAM research. The argumentation is solid, grounded in years of research and practical experience. Professor Mutlu’s presentation effectively justifies the need for simulation and prototyping in memory research, using concrete examples like row hammer and self-managing DRAM. The inclusion of invited speakers adds credibility and demonstrates the tools’ utility in real-world research. The hands-on session is particularly valuable for attendees to gain practical skills. The tutorial successfully argues that these tools are essential for evaluating new memory architectures and understanding DRAM behavior.

Scientific Rigor, Source Quality, Title Accuracy

The tutorial demonstrates high scientific rigor, with references to peer-reviewed papers and open-source repositories. The sources cited are directly relevant and include the Ramulator 2.0 paper, DRAM Bender paper, and GitHub repositories. The title accurately reflects the content, as it is indeed a tutorial on these two tools. The presentation is well-structured, with clear explanations and technical depth. The inclusion of invited speakers from the community further enhances the credibility. Overall, the sources are reliable and the content is aligned with the title.

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Title / Content Match

The title accurately reflects the content: a tutorial on Ramulator and DRAM Bender held at ISCA 2026.

Quality & Reliability

9/10

The tutorial is presented by leading researchers in computer architecture, including Professor Onur Mutlu, and is based on open-source tools with extensive documentation and peer-reviewed publications. The content is technically rigorous and well-structured, with references to specific papers and GitHub repositories.

Key Moments

Markers derived by PSI from the transcript: the creator did not define chapters.

Cited Sources

Concurring Sources

  • Ramulator 2.0 Paper — The paper describes the simulator in detail, consistent with the tutorial's claims.
  • DRAM Bender Paper — The paper describes the testing infrastructure, consistent with the tutorial's claims.

Contribution & Novelties

The tutorial provides a comprehensive introduction to two essential open-source tools for DRAM research, enabling both simulation and real-chip characterization. It highlights recent discoveries in DRAM behavior, such as variable read disturbance and the need for self-managing DRAM, and demonstrates how these tools can be used to explore these phenomena. The inclusion of hands-on sessions and invited talks from the community adds practical value.

Pour aller plus loin :

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Radar Profile

The radar profile shows high scores across all dimensions, indicating a well-rounded and reliable tutorial. The strong scores in quantity and quality of information reflect the comprehensive coverage and technical depth, while the high technical level and reliability scores underscore the expertise of the presenters and the credibility of the tools.

Reliability 9/10

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