
Advanced CMOS Scaling: FinFET to GAA and CFET | 2026 L14
Keywords
Summary
162 words
Critical Evaluation
Value of the Information & Strength of the Argument
The lecture provides valuable and up-to-date information on the state-of-the-art in CMOS scaling, covering both fundamental physics and recent industry developments. The argumentation is solid, building from basic equations to explain why planar scaling fails and how multi-gate architectures address these issues. The professor clearly explains the trade-offs and challenges, such as the limitations of FinFET geometry and the benefits of GAA. The content is well-structured and logically presented, making it accessible to students with a background in semiconductor physics.
Scientific Rigor, Source Quality, Title Accuracy
The lecture demonstrates scientific rigor by grounding explanations in established physics and referencing real industry milestones (e.g., Intel’s 22nm tri-gate, Samsung’s 3nm GAA). The sources cited are primarily the course materials and the professor’s own knowledge, with no external references provided in the description. The title accurately reflects the content, which focuses on advanced CMOS scaling. The lecture is part of a university course, indicating a level of academic credibility.
165 words
Title / Content Match
The title accurately reflects the content, which covers the evolution from FinFET to GAA and CFET architectures.
Quality & Reliability
8/10
Lecture by a professor at a reputable university, covering established semiconductor physics and recent industry developments. The content is technically accurate and well-structured, though it is a lecture rather than peer-reviewed research.
Key Moments
Markers derived by PSI from the transcript: the creator did not define chapters.
- Introduction to the lecture: overview of FinFET, GAA, and CFET architectures.
- Recap of planar MOSFET equations and the classical scaling rules.
- Explanation of short-channel effects: threshold voltage roll-off, DIBL, and subthreshold swing degradation.
- Discussion of the 60 mV/decade subthreshold swing limit and the body factor.
- Introduction to FinFET: structure, advantages, and historical development.
- Limitations of FinFET: quantum effects, aspect ratio, and parasitic capacitance.
- Transition to Gate-All-Around (GAA) nanosheet transistors: structure and benefits.
- Industry adoption of GAA: Samsung 3nm, TSMC N2, and Intel 18A.
- Introduction to CFET: vertical stacking of n-type and p-type transistors.
- Future challenges and roadmap for CMOS scaling.
Cited Sources
- NYCU Course Timetable — Course details for the Semiconductor Physics and Devices course.
Concurring Sources
- Intel 22nm Tri-Gate Technology — Intel's announcement of the first high-volume manufacturing of FinFET technology.
- Samsung 3nm GAA — Samsung's announcement of the first production of GAA transistors.
Contribution & Novelties
This lecture provides a clear and structured explanation of the evolution from planar MOSFETs to advanced multi-gate architectures, synthesizing fundamental physics with recent industry developments. It offers valuable insights into the challenges and solutions for continued CMOS scaling.
Pour aller plus loin :
- FinFET - Wikipedia — Overview of FinFET technology.
- Gate-all-around FET - Wikipedia — Detailed description of GAA transistors.
- Subthreshold swing - Wikipedia — Explanation of subthreshold swing and its significance.
73 words
Radar Profile
The radar profile shows high scores across all dimensions, indicating a well-rounded and reliable educational resource. The lecture excels in providing both quantitative information and technical depth, with strong reliability and quality.
💬 No comments were provided for analysis.